1. Field of the Invention
The present invention relates to a data holding device, and in particular, relates to a nonvolatile technique thereof.
2. Description of Related Art
As a data holding device that is used for a sequential circuit such as a latch circuit, there is known a circuit having two inverter circuits connected in series like a loop, for example. However, such the data holding device usually holds data only in a volatile manner, so the data will be lost when the power supply is turned off. In other words, even if the power supply is turned on again, the data stored before the power supply is turned off cannot be restored.
Therefore, when a sequence process utilizing the latch circuit having the data holding device is interrupted for some reason, the power supply should not be turned off for holding the data, while the power is consumed. In addition, if the sequence process is interrupted by a power failure or other accident, it is necessary to restart the process from the beginning with a large loss of time.
In order to resolve this problem, Japanese Patent No. 3737472 (hereinafter referred to as Patent Document 1), which was filed by the same applicant, discloses and proposes a data holding device that uses a ferroelectric capacitor for holding data in a nonvolatile manner.
FIG. 27 illustrates a circuit of a data holding device according to a conventional example.
The data holding device illustrated in FIG. 27 includes a ferroelectric element CL connected to a signal line (a thick line in FIG. 27 on which held data shows up as a voltage signal) in a storage element having a loop structure portion (enclosed by a broken line in FIG. 27) constituted of inverters INVx and INVy.
When the power supply is turned off, a remanent polarization state of the ferroelectric element CL is set by using a voltage value on the signal line, so that data is written in the ferroelectric element CL. Such the writing action enables to store the data in a nonvolatile manner even after the power supply is turned off.
On the other hand, when the data written in the ferroelectric element CL is read out, the node N is set to a floating state after the power supply is turned on. Then, in this state, a voltage pulse is applied to an end of the ferroelectric element CL via the plate line PL, so that a voltage signal corresponding to the remanent polarization state of the ferroelectric element CL is generated at the node N. The voltage signal generated at the node N is decided to be 0 or 1 as data (0-1 decision) based on a threshold value of the inverter INVx.
According to the conventional data holding device described above, it is surely advantageous that data can be held even if the power supply is turned off.
However, the conventional data holding device described above has a disadvantage that the ferroelectric element CL in the storage element becomes a large load capacitance existing on the signal line in a normal operation, which may cause a decrease of speed or an increase of power consumption in the storage element.
In addition, the conventional data holding device described above is required to setting the node N to a floating state (to turn off both the pass switches SWx and SWy) when the data is read out, so that the charge corresponding to the remanent polarization state of the ferroelectric element CL does not leak to the power supply line or to the ground line. Therefore, the conventional data holding device described above needs four types of clock signals (CKA, /CKA, CKB and /CKB) as drive clock signals for the pass switches SWx and SWy, which may cause an increase of power consumption.
In addition, as illustrated in FIGS. 27 and 28, the conventional data holding device described above uses a capacitive coupling between the ferroelectric element CL and a gate capacitance of a transistor constituting the inverter INVx so as to read a voltage signal Vout corresponding to the remanent polarization state of the ferroelectric element CL. However, the capacitance of the ferroelectric element CL (an upward-sloping solid line in FIG. 28) has a large value (a few hundred farads) while the gate capacitance of the transistor constituting the inverter INVx (a downward-sloping solid line in FIG. 28) has a small value (a few farads). Therefore, the voltage signal Vout that shows up at the node N is as small as approximately 10 to 100 millivolts, so it is difficult to set the threshold value of the inverter INVx in accordance with the voltage signal Vout for performing the 0-1 decision of the read data in view of variation of elements.
In addition, a conventional CMOS circuit has a conspicuous problem that if the power supply voltage decreases to 0.6 volts, data inside the data holding device will change because of fluctuation of the power supply voltage due to on/off of the circuit block power supply, i.e., there is little power margin of the supply voltage with respect to the fluctuation.
In addition, a nonvolatile data holding device incorporating the ferroelectric element does not need the power supply voltage for holding the data, so the problem of changing data due to a fluctuation of the power supply voltage can be resolved. However, in view of characteristics of the ferroelectric element, it is difficult to drive the ferroelectric element by using the power supply voltage of 0.6 volts for writing data in the ferroelectric element. In other words, when the CMOS circuit is driven by the power supply voltage of 0.6 volts, it is difficult to use the same power supply voltage for driving the ferroelectric element.
On the contrary, when the CMOS circuit is driven by the power supply voltage of 3.3 volts, if the same power supply voltage is used for driving the ferroelectric element, unnecessarily large power will be consumed.